If you can give me more information that will help to answer your question. First, does the print or any specification document state which documents to use?
Since the application is space flight hardware is a rather critical one, I strongly recommend either getting training for yourself or finding an experienced person. Unfortunately, most electrical design and test engineers, unless they have worked supporting PCBA assembly, don't know enough about manufacturing and inspection/acceptance related IPC documents and make all kinds of incorrect assumptions about what is and is not covered by a particular IPC document.
Please also read the introductory material in each IPC document. Each document has a scope statement and usually also explains the relationship with closely related documents.
The
PC-HDBK-840 cited by Miner appears to be more PCBA and process design related; the fact that I either never had to use it when I was a quality engineer for PCB assembly also makes me think it is not usually applicable to judging potential defects. I believe i had access to it and looked at a few times but never added it to the documents I consulted when judging a soldermask condition.
IPC-A-610 applies at the assembly level and is focused on inspection and evaluating if an observed condition is a nonconformance. It allows a bit more minor imperfections that at the bare board level covered by IPC-A-600. I assume this is because they know it is difficult to impossible to avoid a small amount of minor soldermask damage during assembly operations. J-STD-001, in your case with the Space addendum, applies to the assembled board as well, but is more manufacturing focused.
For determining compliance of bare board, IPC-A-600 is usually called out as the primary acceptance document and IPC-6012 with space addendum is usually secondary.
FYI: Since you mentioned an assembly, cables are covered by IIPC/WHMA-A-620 which also has a space addendum.